Struct rsim::processor::isa_mods::vector::registers::IntVectorRegisterFile [−][src]
Register file which holds 128-bit integer vectors.
Fields
vreg: [u128; 32]
Trait Implementations
impl Default for IntVectorRegisterFile
[src]
impl Default for IntVectorRegisterFile
[src]impl VectorRegisterFile<u128> for IntVectorRegisterFile
[src]
impl VectorRegisterFile<u128> for IntVectorRegisterFile
[src]fn load_vreg_elem(
&self,
eew: Sew,
vd_base: u8,
idx_from_base: u32
) -> Result<u128>
[src]
&self,
eew: Sew,
vd_base: u8,
idx_from_base: u32
) -> Result<u128>
fn load_vreg_elem_int(
&self,
eew: Sew,
vd_base: u8,
idx_from_base: u32
) -> Result<u128>
[src]
&self,
eew: Sew,
vd_base: u8,
idx_from_base: u32
) -> Result<u128>
fn store_vreg_elem(
&mut self,
eew: Sew,
vd_base: u8,
idx_from_base: u32,
val: u128
) -> Result<()>
[src]
&mut self,
eew: Sew,
vd_base: u8,
idx_from_base: u32,
val: u128
) -> Result<()>
fn store_vreg_elem_int(
&mut self,
eew: Sew,
vd_base: u8,
idx_from_base: u32,
val: u128
) -> Result<()>
[src]
&mut self,
eew: Sew,
vd_base: u8,
idx_from_base: u32,
val: u128
) -> Result<()>