Struct rsim::processor::isa_mods::vector::registers::IntVectorRegisterFile[][src]

pub struct IntVectorRegisterFile {
    vreg: [u128; 32],
}

Register file which holds 128-bit integer vectors.

Fields

vreg: [u128; 32]

Trait Implementations

impl Default for IntVectorRegisterFile[src]

impl VectorRegisterFile<u128> for IntVectorRegisterFile[src]

Auto Trait Implementations

impl RefUnwindSafe for IntVectorRegisterFile

impl Send for IntVectorRegisterFile

impl Sync for IntVectorRegisterFile

impl Unpin for IntVectorRegisterFile

impl UnwindSafe for IntVectorRegisterFile

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.