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A list of all the posts and pages found on the site. For you robots out there is an XML version available for digesting as well.
Pages
Posts
My first article!
My first article, “How Flexible is CXL’s Memory Protection?”, was just published in ACM Queue (it’s even on the front cover!) It discusses PCIe and CXL, their memory security model (and how it leaves something to be desired), and various flavors of capability which may be able to help. The article is available online here, and I plan to publish a copy here in the coming weeks to demo my pie-in-the-sky alternative typesetting language.
CHERI-RVV summary: The quest for secure, vectorized memcpy
This is a condensed version of my master’s thesis (from 15,000 to 5,000 words), which won the RISE 2022 Student competition! I also submitted a 5-minute presentation, which is available on YouTube and the project summary page.
apps
cv_archive
September 2025 - The Voleon Group
I created this version for a hedge fund named The Voleon Group, who cold-emailed me to ask if I was interested in a Research Staff position after my PhD. I was skeptical - the position appeared to be intended for a mathematical/statistics background, and that’s not really my field, but given they were asking after me I figured I’d throw something together. You can see my emphasis on ML, large scale data, and Python; but I can’t really escape my hardware/graphics origins (not that I’d want to!) and in the end the recruiter and I agreed that I would be more suited to something like hardware/software co-design (also difficult to recruit for, apparently).
projects
Portfolio item number 1
Short description of portfolio item number 1
Portfolio item number 2
Short description of portfolio item number 2
publications
Performance Optimization and Visualization for a Fluid Dynamics Simulation
Submitted for Computer Systems Engineering @ University of Warwick, 2021
On creating a real-time GPU fluid simulation (CUDA) and visualization (Vulkan).
Capability-Based Memory Protection for Scalable Vector Processing
Submitted for Advanced Computer Science MPhil @ University of Cambridge, 2022
On applying CHERI-based memory protection to vector processors, particularly scalable vector models e.g. Arm SVE and RISC-V "V".