Struct rsim::processor::models::Rv64imvProcessor

pub struct Rv64imvProcessor {
    pub running: bool,
    pub memory: AggregateMemory,
    pc: u64,
    sreg: RvRegisterFile<u64>,
    csrs: Rv64imvProcessorCSRs,
}

RISC-V Processor Model where XLEN=64-bit. No CHERI support. Holds scalar registers and configuration, all other configuration stored in Rv64imvProcessorModules

Fields

running: bool

memory: AggregateMemory

pc: u64

sreg: RvRegisterFile<u64>

csrs: Rv64imvProcessorCSRs

Implementations

impl Rv64imvProcessor

pub fn new(mem: AggregateMemory) -> (Rv64imvProcessor, Rv64imvProcessorModules)

Create a new processor and vector unit which operates on given memory.

Arguments

• mem - The memory the processor should hold. Currently a value, not a reference.

fn zicsr_conn<'a, 'b>(
    &'a mut self,
    rvv: &'a mut Option<Rv64v>
) -> Zicsr64Conn<'b> where
    'a: 'b, 

fn rv64im_conn<'a, 'b>(&'a mut self) -> Rv64imConn<'b> where
    'a: 'b, 

fn process_inst(
    &mut self,
    mods: &mut Rv64imvProcessorModules,
    inst_bits: u32,
    opcode: Opcode,
    inst: InstructionBits
) -> Result<u64>

Process an instruction, returning the new PC value or any execution error

Arguments

• v_unit - The associated vector unit, which will execute vector instructions if they are found.
• inst_bits - The raw instruction bits
• opcode - The major opcode of the decoded instruction
• inst - The fields of the decoded instruction

Trait Implementations

impl Processor<Rv64imvProcessorModules> for Rv64imvProcessor

fn reset(&mut self, mods: &mut Rv64imvProcessorModules)

Reset the processor and associated vector unit

fn exec_step(&mut self, mods: &mut Rv64imvProcessorModules) -> Result<()>

Run a fetch-decode-execute step on the processor, executing a single instruction

Arguments

• v_unit - The associated vector unit, which will execute vector instructions if they are found.

fn dump(&self, mods: &Rv64imvProcessorModules)

Dump processor and vector unit state to standard output.

fn running(&self) -> bool

fn get_io_values(&self) -> Vec<Option<u64>>