Enum rsim::processor::decode::InstructionBits [−][src]
pub enum InstructionBits { RType { rd: u8, funct3: u8, rs1: u8, rs2: u8, funct7: u8, }, IType { rd: u8, funct3: u8, rs1: u8, imm: Imm, }, ROrIType { rd: u8, funct3: u8, rs1: u8, rs2: u8, funct7: u8, imm: Imm, }, SType { funct3: u8, rs1: u8, rs2: u8, imm: Imm, }, UType { rd: u8, imm: Imm, }, JType { rd: u8, imm: Imm, }, BType { funct3: u8, rs1: u8, rs2: u8, imm: Imm, }, VType { funct3: u8, rs1: u8, rs2: u8, rd: u8, funct6: u8, vm: bool, zimm11: u16, zimm10: u16, }, FLdStType { rd: u8, width: u8, rs1: u8, rs2: u8, funct7: u8, vm: bool, mew: bool, mop: u8, nf: u8, }, }
TODO - Right now this does sign extension up to 32-bits. These should really all be 64-bit, now that we could be decoding 32 or 64-bit instructions. TODO - Make each of these a separate struct? Then we can combine variants in enums, e.g. type ROrIType = (RType, IType).
Variants
Implementations
impl InstructionBits
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impl InstructionBits
[src]pub fn get_opcode(inst: u32) -> Result<Opcode>
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pub fn from_r(inst: u32) -> InstructionBits
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pub fn from_i(inst: u32) -> InstructionBits
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pub fn from_r_or_i(inst: u32) -> InstructionBits
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pub fn from_s(inst: u32) -> InstructionBits
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pub fn from_u(inst: u32) -> InstructionBits
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pub fn from_j(inst: u32) -> InstructionBits
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pub fn from_b(inst: u32) -> InstructionBits
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pub fn from_v(inst: u32) -> InstructionBits
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pub fn from_f_ld_st(inst: u32) -> InstructionBits
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Trait Implementations
impl Clone for InstructionBits
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impl Clone for InstructionBits
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