Module rsim::processor::isa_mods::vector::decode [−][src]
Enums
DecodedMemOp | The different kinds of RISC-V V vector loads/stores. One top-level enum which encapsulates Strided access (also used for basic unit-stride access), Indexed access, and the special cases of unit-stride access (e.g. whole-register, bytemasked, fault-only-first). |
MemOpDir | The “direction” of a memory operation. Used by DecodedMemOp. |
RvvMopType | Memory OPeration enum |
UnitStrideLoadOp | Special variants of vector loads with unit-stride |
UnitStrideStoreOp | Special variants of vector stores with unit-stride |